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High Speed PHY FW Engineer at Cadence - ApplyBlast

High Speed PHY FW Engineer

Cadence

3 months ago

4.0 on Glassdoor

San Jose, United States

Onsite

Full Time

Senior

0 applicants

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About this role

A High Speed SERDES PHY Firmware Design Engineer at Cadence develops physical IP for industry-standard high-speed serial-link protocols, contributing to all phases of firmware development from architecture to deployment. The role involves collaborating with verification and product engineering teams to debug issues, implement features, and support post-silicon testing and customer deployment. Candidates will work independently on assigned tasks while potentially contributing to project leadership within a dynamic team.

Responsibilities

Develop firmware architecture and implement defined features for high-speed SERDES
Collaborate with verification teams to debug firmware issues found in simulations
Support post-silicon testing and validation to identify and resolve functionality issues
Interact with product engineering to debug IP issues in the field and provide hot fixes
Build system-level prototype control software to validate adaptation and control algorithms

Skills

Qualifications

BSc in Electrical EngineeringMSc in Electrical EngineeringUS Citizenship or Permanent Residency

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

View Profile

Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.