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© All Rights Reserved. ApplyBlast.com
Altera
This role involves assisting in the development and maintenance of High Level Synthesis (HLS) compiler infrastructure, supporting the implementation of compiler passes, and optimizing high-level code for hardware synthesis. The position requires analyzing and improving the compilation flow from C/C++ to hardware description languages while researching cutting-edge compiler technologies for AI computation workloads. The intern will also help integrate and test new features, debug compiler outputs, and document work to contribute to internal knowledge bases.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
16% below the average for this role