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Lead Design Engineer at Cadence - ApplyBlast

Lead Design Engineer

Cadence

4 months ago

4.0 on Glassdoor

Noida, India

Onsite

Full Time

Senior

0 applicants

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About this role

A Senior Design Verification Engineer at Cadence creates and executes verification plans for complex interconnect IP and Tensilica Processor subsystems. The role involves crafting UVM-based environments, managing coverage closure, and collaborating cross-functionally to ensure design quality.

Responsibilities

Design and execute verification plans for interconnect IP and processor subsystems
Develop and maintain UVM-based design verification environments
Manage coverage collection and closure for complex configurable designs
Collaborate with design and architecture teams to define verification scope
Build flexible and reusable testbenches using System Verilog and scripting languages

Skills

Qualifications

BS in Electrical EngineeringBS in Computer Engineering

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

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Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.