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Lead Digital Verification Engineer at Cadence - ApplyBlast

Lead Digital Verification Engineer

Cadence

4 months ago

4.0 on Glassdoor

Montreal

Onsite

Full Time

Senior

0 applicants

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About this role

A Lead Verification Engineer at Cadence develops high-performance physical IP by verifying digital RTL and building reusable verification components. The role involves contributing to verification flows, test plan development, and achieving functional and code coverage while collaborating with global design teams. Ideal candidates lead verification strategies using SystemVerilog and methodologies like UVM to ensure industry-standard protocol compliance.

Responsibilities

Verify digital RTL components and develop reusable verification environments
Drive flow development and test plan execution for protocol compliance
Achieve functional and code coverage closure for design projects
Collaborate with design teams across multiple worldwide geographies
Communicate project progress and technical status to engineering teams

Skills

Qualifications

Bachelor of Science in Electrical EngineeringBachelor of Science in Computer EngineeringBachelor of Science in Computer Science

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

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Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.