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Lead Software Engineer - Low Power Verification at Cadence - ApplyBlast

Lead Software Engineer - Low Power Verification

Cadence

1 month ago

4.0 on Glassdoor

San Jose, California, United States

Onsite

Full Time

Senior

0 applicants

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About this role

This role involves improving the performance and usability of UPF debug features for low-power verification software on Palladium and Protium platforms. The position focuses on scaling UPF event logging, rebuilding documentation, and developing AI-assisted debug tools for multi-billion-gate designs. The engineer will collaborate with R&D and deployment teams to unify UPF solutions across key flows.

Responsibilities

Enhance UPF debug features and improve performance across Parallel Partition Compiler and Modular Compiler flows
Scale UPF event logging and violation detection for multi-billion-gate low-power designs
Rebuild UPF documentation and develop AI-assisted debug tools to reduce time-to-root-cause

Skills

Qualifications

BS in CSBS in EEMSPhD

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

View Profile

Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.