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Memory Subsystem Integration Engineer at Cadence - ApplyBlast

Memory Subsystem Integration Engineer

Cadence

2 months ago

4.0 on Glassdoor

Nanjing, Jiangsu, China

Onsite

Full Time

Senior

0 applicants

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About this role

The role supports pre‑silicon integration, QA testing, and post‑silicon bring‑up of memory subsystem products, assisting customers with simulations, timing closure, and documentation. It also leverages AI‑powered tools to enhance productivity and provide accurate technical support.

Responsibilities

Support pre‑silicon integration and implementation of memory subsystem products
Assist customers with RTL and gate‑level simulations and timing closure
Conduct post‑silicon bring‑up and production test activities

Skills

Qualifications

B.S. Electrical/Computer EngineeringM.S. Electrical/Computer Engineering

About Cadence

cadence.com

Headquarters

San Jose, California, United States

Company Size

10001+ employees

Founded

1988

View Profile

Cadence is a company specializing in electronic design automation (EDA) software and engineering services for the semiconductor and electronics industries. Their tools enable design and verification of integrated circuits, systems on chips, and electronics systems, streamlining the development process for engineers and designers. With a commitment to innovation and excellence, Cadence empowers companies to enhance product performance and reduce time to market through advanced simulation, verification, and design tools.