Altera
Altera is looking for a Memory Validation Architect to define and lead the validation architecture for next‑generation memory subsystems across its FPGA portfolio. The role involves shaping validation strategy for DDR5, LPDDR5/LPDDR6, HBM and future memory technologies, partnering with architecture, RTL, firmware, board design, and memory vendors to ensure quality, performance, and customer success.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.