Altera
This senior individual-contributor role at Altera focuses on owning and reinventing the physical design implementation and signoff methodology across the company's product portfolio. The position involves architecting scalable flows, integrating AI/ML-driven techniques, and establishing quality gates to ensure faster, higher-quality tapeout success. The role requires deep technical expertise in place-and-route, EMIR analysis, timing, and power signoff to lead strategy and mentor engineering teams.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
58% above the average for this role
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