Senior Physical Design Engineer - Signoff Methodology

The Senior Physical Design Engineer - Signoff Methodology role involves developing and refining backend methodologies and flows from RTL to GDS for high-quality VLSI designs. The position requires contributing to the advancement of signoff flows, including physical synthesis, place and route, and timing closure, while collaborating with engineering teams to enhance implementation tool flows. This hybrid role is based at Cisco's Yerevan office and supports the creation of advanced silicon technologies.