Principal Design Engineer
BETA CAE Greece(1 year ago)
About this role
At Cadence, candidates are sought for a leadership role focused on Memory PHY Layout design, requiring expertise in Finfet technology and advanced technology nodes like 3nm, 5nm, and 7nm. The position emphasizes collaboration with circuit leads and layout teams, and includes hands-on design of analog and high-speed layout blocks.
Required Skills
- Finfet Technology
- Analog Layout
- Mixed-Signal Layout
- High-Speed Layout
Qualifications
- 6+ Years Experience
About BETA CAE Greece
beta-cae.comBETA CAE Systems is a leading provider of advanced simulation software solutions that cater to the needs of engineers and researchers in various fields, including automotive, aerospace, and manufacturing. With a comprehensive suite of tools for computer-aided engineering (CAE), BETA empowers users to effectively perform tasks related to finite element analysis (FEA), computational fluid dynamics (CFD), and process automation. Recently acquired by Cadence, the company continues to innovate in areas such as machine learning and predictive analysis, bolstering its commitment to enhancing product design and simulation accuracy.
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