ApplyBlast uses AI to match you with the right jobs, tailor your resume and cover letter, and apply automatically so you can land your dream job faster.
© All Rights Reserved. ApplyBlast.com
ApplyBlast uses AI to match you with the right jobs, tailor your resume and cover letter, and apply automatically so you can land your dream job faster.
© All Rights Reserved. ApplyBlast.com
Astera Labs
Astera Labs is hiring a Principal Design Verification Engineer to own functional verification of high-speed SerDes/PHY IP, the connectivity engine powering rack-scale AI infrastructure. The role involves architecting verification environments, driving coverage closure, and ensuring first-pass silicon success on the analog/digital boundary. This hands-on position requires collaboration with analog/mixed-signal designers, digital architects, and SoC integration teams to verify multi-Gbps SerDes blocks for advanced AI platforms.
Headquarters
Santa Clara, California, United States
Company Size
201-500 employees
Founded
2017
Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Astera Labs.
Why Astera Labs Shares Are Surging On Wednesday - Astera Labs (NASDAQ:ALAB)
19 hours ago
AMS/DMS Verification Engineer
Saige Partners
Serdes Phy Analog Design Engineer Bangalore Karnataka India
Qualcomm Incorporated
Staff Design Verification Engineer- SerDes / AMS / mixed‑signal IPs
marvellsemiconductor.com
Senior Staff Engineer - Design Verification- SerDes/PHY/AMS
marvellsemiconductor.com
Principal Modem PHY IP Design Verification Engineer
Blue Origin
PHY Post Silicon Validation Engineer
Cisco Systems, Inc.
