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© All Rights Reserved. ApplyBlast.com
powerlattice
A Principal Digital Design Engineer at PowerLattice drives microarchitecture, RTL development, and back-end implementation for complex digital systems and SoC components. The role requires hands-on design, leadership, and cross-functional collaboration across teams.
Company Size
1-10 employees
PowerLattice is a hardware company focused on AI-ready power delivery. They reimagine power delivery for next-generation AI accelerators with the industry’s first power delivery chiplet. Their approach aims to enable scalable, efficient power architectures that optimize performance for AI workloads. In short, PowerLattice provides innovative power infrastructure components designed for high-performance AI hardware.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for powerlattice.
36% above the average for this role
PD - Sr Staff — CAD & Design Methodology | RTL-to-GDSII Flow | Advanced Node Methodology |
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