Principal Digital Design Engineer

Renesas is seeking a Principal Digital Design Engineer to develop digital sections of leading-edge memory data buffer chips for DDR5, DDR6, and beyond, serving data centers for AI and cloud computing. The role involves proposing, architecting, and designing RTL in Verilog for mixed-signal integrated circuits while applying low power and high-speed design concepts. This position requires overseeing digital backend design processes and mentoring junior engineers within a collaborative team environment.