Principal Physical Design Engineer

We are seeking a highly skilled Physical Design Flow and Place‑and‑Route Development Engineer to drive methodology, automation, and implementation solutions for advanced ASIC designs. This role focuses on developing scalable P&R methodologies, improving flow robustness, and partnering with design teams to deliver high‑quality, high‑performance silicon using tools like Cadence Innovus and Synopsys Fusion Compiler. The engineer will collaborate across EDA, library, and architecture teams to support technology bring‑up and ensure best‑in‑class physical signoff results.