Sr Layout Engineer-DPG LPDDR

An experienced Physical Design Implementation Engineer at Micron Technology leads digital blocks from floor planning to tape-out, ensuring timing closure and signoff for cutting-edge memory and storage solutions. The role requires deep proficiency with advanced process nodes and industry-standard tools like Cadence Innovus and Synopsys IC Compiler II to deliver high-performance designs for AI and 5G applications. This position involves collaborating with cross-functional teams to resolve physical verification issues and mentoring junior engineers on technical best practices.