Principal Soc Circuit Architect United States California Mountain View

This role defines and supervises high-speed IO PHYs, signal and power integrity, and end-to-end power delivery solutions for System on Chip (SoC) architectures. The position involves establishing REFCLK and digital clocking methodologies, partnering with package and memory teams, and ensuring quality control across SoC technology definitions. Candidates must possess extensive experience in SoC circuit architecture, PLL/clocking solutions, and high-speed interface design.