RTL IP Design Engineer
Marvell Technology(1 month ago)
About this role
As a Principal Design Engineer at Marvell, you will lead micro-architecture and RTL development, engaging in HW/SW co-design efforts across multi-functional teams. This role involves developing state-of-the-art designs for the UCIe IP roadmap and requires a strong understanding of SoC architecture.
Required Skills
- Micro-Architecture Design
- RTL Development
- SoC Architecture
- Verilog
- VHDL
Qualifications
- Bachelor’s Degree in Computer Science
- Master’s Degree in Electrical Engineering
- PhD in Computer Science
About Marvell Technology
marvell.comDesigned for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.
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