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© All Rights Reserved. ApplyBlast.com
Celero Inc
The Senior Analog Layout Design Engineer will lead the physical layout of complex analog and mixed-signal IP blocks such as ADCs, DACs, and PLLs for advanced optical communication systems. The role involves close collaboration with circuit designers and verification teams, mentoring junior engineers, and ensuring first‑pass silicon success through rigorous layout and sign‑off processes.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
Celero Inc didn’t post a salary, so this is our estimate from similar listings.
38% below the average for this role