Capgemitecp3
This role involves designing and enabling cutting-edge high-speed mixed-signal silicon for next-generation technologies through robust, scalable layouts in advanced FinFET nodes. The position requires collaboration with design, verification, and process teams to deliver high-performance products across various industries. The engineer will lead physical layout activities from concept through tape-out while mentoring junior team members.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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and employee contacts for Capgemitecp3.
32% below the average for this role