Senior CAD Engineer

A Senior Formal Equivalence Checking and Synthesis Methodology Engineer at NVIDIA's Bengaluru Design Centre will be part of the ASIC-PD Methodology team responsible for defining and deploying RTL-synthesis and logic-equivalence methodologies for VLSI designs. The role focuses on developing, maintaining, and optimizing methodology flows, automating processes, and adapting practices to technology and tool updates to support high-performance ASIC development.