Senior CPU Design Verification Engineer

SiFive is seeking a Senior CPU Design Verification Engineer to own block- and subsystem-level design verification for advanced out-of-order CPU cores. The role involves collaborating with micro-architects and RTL designers to verify complex front-end designs, execution pipelines, and memory systems using modern, coverage-driven methodologies. The position requires developing and maintaining SystemVerilog/UVM testbenches, defining coverage plans, and debugging complex failures in speculation and memory ordering.