HCL Group
This role requires a Senior Engineer with 5 to 7 years of experience to lead a team of entry-level engineers in Full chip RTL integration and ASIC/SoC development. The candidate will be responsible for managing synthesis, timing constraints, static timing analysis closure, and resolving physical design congestion issues while integrating various IP blocks.
HCL Group is a pioneering Indian conglomerate established in 1976, recognized as one of India's original IT garage start-ups and an early innovator in modern computing. The Group operates a portfolio of companies spanning technology services (HCLTech), software products (HCLSoftware), healthcare solutions (HCL Healthcare), IT distribution (HCL Infosystems), and online education (HCL GUVI). It also invests in philanthropy, sports, and music through various strategic programs and foundations.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for HCL Group.
HCL Group didn’t post a salary, so this is our estimate from similar listings.
6% below the average for this role
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