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Altera
A Lead DV Engineer at Altera focuses on IP verification and validation for high-speed transceiver protocols. The role involves developing verification plans, creating testbenches, and ensuring robust functionality across FPGA IP product portfolios.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.