Senior Photonic Layout Engineer

IonQ(6 months ago)

HybridFull TimeSenior$107,123 - $140,251PIC Design

About this role

The Senior Photonic Layout Engineer will own full-reticle tapeouts of photonic integrated circuits (PICs) that integrate into trapped-ion quantum computers and help advance scalable quantum hardware. The role involves developing and maintaining internal PCell and circuit layout libraries and creating automation for mask layout and tapeouts. The engineer will work closely with PIC, ion trap, test, packaging, and foundry teams to support development and deployment of IonQ’s photonic platforms.

View Original Listing

Required Skills

Python
Photonic Layout
PCell Development
Circuit Layout
Layout Automation
PDK Development
Physical Verification
DRC
LVS
Tapeout

+4 more

Qualifications

Bachelor's Degree in Photonics, Physics, or Electrical Engineering
M.S. or Ph.D.

About IonQ

ionq.com

IonQ builds trapped‑ion quantum computers and full‑stack systems designed to tackle complex computational problems. Their platform combines high‑fidelity trapped‑ion qubits, control hardware, and developer tools to deliver quantum processing via cloud integrations and APIs. IonQ targets applications in chemistry, optimization, machine learning, and finance while working with enterprises, researchers, and cloud providers to make quantum computing broadly accessible.