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Senior Physical Design Engineer at Astera Labs - ApplyBlast

Senior Physical Design Engineer

Astera Labs

7 days ago

4.3 on Glassdoor

Singapore, Singapore, Singapore

Onsite

Full Time

Senior

0 applicants

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About this role

Astera Labs is seeking a Senior Physical Design Engineer to join its high-performance design team, focusing on next-generation transceiver IPs for advanced technology nodes. The role involves performing block-level and top-level physical implementation, collaborating with cross-functional teams, and ensuring signoff for high-speed designs. The position requires expertise in physical design techniques, tool usage, and scripting to support chip development.

Responsibilities

Perform block-level and top-level physical implementation including floorplanning, placement, and routing
Collaborate with RTL and STA teams to ensure clean handoffs and support timing convergence
Integrate IPs and top-level blocks with attention to physical interfaces and timing alignment

Skills

Qualifications

Bachelor's degree in Electrical EngineeringMaster's degree in Electrical EngineeringBachelor's degree in Electronics EngineeringMaster's degree in Electronics Engineering

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

View Profile

Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.