Senior Principal DFT Design Engineer
BETA CAE Greece(1 month ago)
About this role
A SoC/ASIC Digital Design Engineer at Cadence contributes to the development and delivery of semiconductor designs by focusing on chip testability and quality. The role is centered on applying advanced test methodologies and working with industry-standard flows and tools to support reliable ASIC/SoC products.
Required Skills
- DFT
- Scan Chain
- Compression Scan
- MBIST
- ATPG
- Verilog
- Synthesis
- Verification
- Debugging
- JTAG
+4 more
Qualifications
- US Citizenship
About BETA CAE Greece
beta-cae.comBETA CAE Systems is a leading provider of advanced simulation software solutions that cater to the needs of engineers and researchers in various fields, including automotive, aerospace, and manufacturing. With a comprehensive suite of tools for computer-aided engineering (CAE), BETA empowers users to effectively perform tasks related to finite element analysis (FEA), computational fluid dynamics (CFD), and process automation. Recently acquired by Cadence, the company continues to innovate in areas such as machine learning and predictive analysis, bolstering its commitment to enhancing product design and simulation accuracy.
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