Altera
A Senior Validation Engineer at a high-speed FPGA/PLD company focuses on validating next-generation devices with a strong emphasis on ARM core, memory management, and high-speed peripherals. The role involves developing validation strategies, utilizing protocol exerciser/analyzer solutions, and collaborating on PCB design to ensure quality and performance.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.