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© All Rights Reserved. ApplyBlast.com
Altera
An experienced Senior Static Timing Analysis (STA) Developer role focused on building next-generation timing analysis engines for advanced ASIC and FPGA design flows. The position centers on delivering industry-leading STA capability that can scale to massive SoC designs and complex clocking in modern multi-threaded compute environments. The role is based in San Jose, CA with a Bay Area compensation range.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
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