Principal Static Timing Analysis Engineer
Silicon Labs
About this role
The Principal Static Timing Analysis Engineer at Silicon Labs focuses on developing timing constraints and facilitating timing closure for low power Wireless SoCs and IP systems. The role involves collaborating with global teams to analyze timing reports, improve timing analysis flows, and support the development of advanced edge connectivity applications.
Skills
Qualifications
About Silicon Labs
silabs.comSilicon Labs makes silicon, software and solutions for a more connected world.
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About Silicon Labs
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Leadership Team
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
Unlock Company Insights
View leadership team, funding history,
and employee contacts for Silicon Labs.
Salary
$161k – $298k
per year
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