Celero Inc
The Senior/Principal Analog Layout Engineer will lead the physical layout design of complex analog and mixed-signal IP blocks for advanced optical communication systems, collaborating with circuit designers and verification teams to ensure first-pass silicon success. The role involves mentoring junior engineers, overseeing layout verification, and contributing to chip-level planning and automation initiatives.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
58% above the average for this role