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Altera
The role involves leading device‑level and system‑level validation of HPS USB subsystems for next‑generation FPGA SoC devices, including bring‑up, debugging, and ensuring reliability, interoperability, and performance. The engineer will work closely with architecture, design, firmware, and platform teams to develop validation strategies, test plans, and automation frameworks.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
41% below the average for this role