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Altera
This role involves leading the bring-up and validation of high-speed analog I/O and PHY designs, including transmitters, receivers, and clocking circuits for various interfaces. The engineer will develop validation frameworks, execute post-silicon bring-up, and drive cross-functional issue resolution. Collaboration with firmware and circuit design teams is essential to validate calibration flows and improve design architectures.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
Altera didn’t post a salary, so this is our estimate from similar listings.
35% below the average for this role
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