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Silicon Validation Engineer at MatX - ApplyBlast

Silicon Validation Engineer

MatX

2 months ago

Remote

Full Time

Senior

0 applicants

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About this role

This role focuses on owning silicon bring-up and validation from first power-on through production readiness for MatX's high-performance GenAI compute platforms. The engineer will develop and execute validation plans for chip-level and SiP-level functionality, performance, and reliability while debugging complex cross-functional failures. Success in this position requires strong hands-on experience with post-silicon bring-up, hardware emulation, and top-level DV for complex SoCs or accelerators.

Responsibilities

Own silicon bring-up and validation from first power-on through production readiness
Develop and execute validation plans for chip-level and SiP-level functionality and performance
Debug complex cross-functional failures using logs, registers, traces, and lab equipment

Skills

About MatX

matx.com

Headquarters

Mountain View, California, United States

Company Size

1-10 employees

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MatX designs high-throughput chips and systems purpose-built for large transformer AI models, with their MatX One chip delivering leading FLOPS/mm2, low-latency decode, and the most scale-up interconnect of any announced product. Supporting clusters of hundreds of thousands of chips, MatX targets training, RL, and inference workloads for large dense and MoE models with no upper limit on model size, serving the large model needs of frontier labs. MatX provides a programming model that gives users direct hardware control, with weights typically in SRAM for low latency and KVs in HBM for long-context support.