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Home | Ultra-Low-Power Infrastructure for the AI Era
This role leads the architecture, design, and optimization of high-performance, low-power standard cell libraries and custom digital circuits for next-generation AI and high-performance computing silicon. The position involves driving transistor-level innovation across advanced process technologies while collaborating with layout, characterization, and product engineering teams to deliver world-class PPA and manufacturability. It is a technical leadership role focused on mentoring engineers and shaping the future of the silicon platform.
Delivering proven, breakthrough, ultra-low-power compute for cloud, edge, and physical AI applications.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Home | Ultra-Low-Power Infrastructure for the AI Era.
Home | Ultra-Low-Power Infrastructure for the AI Era didn’t post a salary, so this is our estimate from similar listings.
14% above the average for this role