STA methodology engineer
NXP Semiconductors(8 months ago)
About this role
A STA Methodology Engineer on the CTO-DE-FDIP-Logic Libraries team responsible for benchmarking logic libraries across advanced technology nodes and advancing static timing analysis methodologies. The role focuses on evaluating synthesis and PNR-based flows on real-world chips and collaborating with Timing Methodology and Signoff teams to ensure robust timing signoff.
Required Skills
- STA
- Timing Analysis
- Timing Constraints
- PNR Flows
- Synthesis
- Python
- EDA Tools
- Automation
- Multivoltage
- Crosstalk Analysis
+2 more
Qualifications
- Bachelor's in Electrical Engineering
- Master's in Electrical Engineering
- Bachelor's in Electronics Engineering
- Master's in Electronics Engineering
About NXP Semiconductors
nxp.comNXP is a global semiconductor company creating solutions that enable secure connections for a smarter world.
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