Staff Design Verification Engineer
Marvell Technology
About this role
An ASIC Design Engineer on Marvell’s Central Engineering AMS‑IP team working on high‑speed SerDes and other analog mixed‑signal IPs. The role focuses on verification and evaluation of digital circuits for data‑communication ICs across Marvell product lines, contributing to enterprise, cloud/AI, and carrier architectures. The position supports pre‑ and post‑silicon activities and collaborates with cross‑functional global teams to deliver IP solutions.
Skills
Qualifications
About Marvell Technology
marvell.comDesigned for your current needs and future ambitions, Marvell delivers the data infrastructure technology transforming tomorrow’s enterprise, cloud, automotive, and carrier architectures for the better.
Recent company news
MarketBeatWilmington Savings Fund Society FSB Lowers Stake in Marvell Technology, Inc. $MRVL
2 hours ago
The Motley FoolMarvell Technology vs. Broadcom: Which Custom AI Chip Stock Has More Upside?
19 hours ago
Simply Wall StreetMarvell’s 260 Lane Switches Highlight Growing AI Data Center Opportunity
20 hours ago
National TodayCIBC Private Wealth Group LLC Trims Marvell Technology Holdings
5 hours ago
Marvell TechnologyMarvell Technology, Inc. Reports Fourth Quarter and Fiscal Year 2026 Financial Results
2 weeks ago
About Marvell Technology
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Leadership Team
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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View leadership team, funding history,
and employee contacts for Marvell Technology.
Salary
$73k – $97k
per year
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