Staff Engineer, Physical Design - Caches

A Staff Physical Design Engineer at SiFive owns the physical implementation of critical cache structures and SRAM subsystems from RTL to GDSII, delivering high-performance, dense, and power-efficient designs. This role bridges architecture, RTL, and implementation teams to drive co-design optimizations that impact speed, area, and efficiency across product lines. Engineers in this position manage synthesis, place-and-route, signoff, and aggressive PPA optimization for memory-heavy blocks.