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Staff RTL Design Engineer - CPU LS/PF/MMU at SiFive - ApplyBlast

Staff RTL Design Engineer - CPU LS/PF/MMU

SiFive

3 months ago

3.9 on Glassdoor

United States

Onsite

Full Time

Senior

0 applicants

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About this role

As a CPU Microarchitecture/RTL design engineer at SiFive, you will architect, design, and implement new features and performance improvements for industry-leading CPU cores based on the open-source RISC-V architecture. You will integrate design content into the Chisel/FIRRTL framework, collaborate on verification plans, and optimize physical designs to meet strict frequency, area, and power goals.

Responsibilities

Architect and implement new features in RISC-V CPU core generators using Chisel
Integrate design content into the Chisel/FIRRTL framework for configuration and generation
Create and execute thorough verification test plans with the design verification team
Collaborate with physical implementation to optimize frequency, area, and power goals
Develop microarchitecture specifications and ensure comprehensive documentation

Skills

Qualifications

BS in Computer ScienceBS in Computer EngineeringBS in Electrical EngineeringMS in Computer ScienceMS in Computer Engineering

About SiFive

sifive.com

Headquarters

Santa Clara, California, United States

Company Size

501-1000 employees

Founded

2015

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As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.