Staff / Senior Staff Physical Design Engineer

This role involves driving full-chip or block-level physical implementation from netlist to GDSII, ensuring high-quality tapeouts while achieving timing, power, and area targets. The position requires expertise in physical design flows, timing closure, and debugging DRC/LVS/EM/IR issues to support design convergence. Candidates will collaborate with cross-functional teams and foundry partners to optimize designs and manage automation scripts for PD flows.