Staff/Senior Staff Engineer - AMS Verification
Silicon Labs(10 months ago)
About this role
This role is for an experienced verification engineer responsible for design verification of next-generation IPs/SoCs with emphasis on performance, power, and functionality sign-off. The engineer will develop behavioral/RNM models and participate in all aspects of the VLSI verification cycle, from testbench architecture and verification planning to execution and closure. The position requires ownership of IP/block verification and close collaboration with design, SoC, validation, synthesis, and PD teams.
Required Skills
- AMS Verification
- Mixed Signal
- VLSI Verification
- Testbench Development
- Verification Planning
- RTL
- Verilog
- SystemVerilog
- Verilog-AMS
- UVM
+5 more
Qualifications
- Bachelor's in Electrical Engineering
- Master's in Electrical Engineering
- Bachelor's in Computer Engineering
- Master's in Computer Engineering
About Silicon Labs
silabs.comSilicon Labs makes silicon, software and solutions for a more connected world.
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