Staff/Senior Staff Engineer - AMS Verification

This role is for an experienced verification engineer responsible for design verification of next-generation IPs/SoCs with emphasis on performance, power, and functionality sign-off. The engineer will develop behavioral/RNM models and participate in all aspects of the VLSI verification cycle, from testbench architecture and verification planning to execution and closure. The position requires ownership of IP/block verification and close collaboration with design, SoC, validation, synthesis, and PD teams.