Codasip
This role involves verifying RISC-V processors and extensions by developing verification solutions, defining strategies, and collaborating with engineers to deliver verification activities. The position requires expertise in functional processor verification methodologies, fluency in languages like SystemVerilog and Python, and a strong understanding of computer architecture. Candidates will work on clean-sheet designs for high-performance CPUs within an international team at the Czech Design Centers.
Codasip is a European leader in RISC‑V custom compute, helping companies develop differentiated products by harnessing the open RISC‑V ISA. The company provides configurable RISC‑V processor IP, processor-design tools, and engineering services to tailor cores — including custom instructions and tuned performance/power tradeoffs — to specific applications. Customers use Codasip to accelerate time‑to‑market, reduce area and energy consumption, and add domain‑specific features like security or AI acceleration. Together its IP, toolchain and support deliver bespoke compute solutions for embedded, edge and specialized silicon markets.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Codasip.
Codasip didn’t post a salary, so this is our estimate from similar listings.
7% above the average for this role