VLSI Design Verification Manager - Slingshot ASIC Team

A VLSI Design Verification Manager at HPE leads a team of engineers in designing and verifying high-performance Slingshot ASICs for HPC and AI supercomputers. The role involves defining verification methodologies, developing SystemVerilog/UVM environments, managing project deliverables, and mentoring staff to ensure functional correctness and quality sign-off. responsibilities: Provide leadership and direction for all phases of pre-silicon design verification. Define, own, and evolve design verification methodology. Ensure development of robust SystemVerilog and UVM-based environments. Drive regression health and failure triage in collaboration with design teams. Recruit, mentor, and develop verification engineers.