Celero Inc
The Analog Design Engineer will design high-speed analog and mixed-signal circuits, including broadband amplifiers, clock generation blocks, and fundamental analog components, for next-generation AI infrastructure transceivers. The role involves architecture, silicon bring‑up, verification, and documentation while collaborating with a world‑class engineering team.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
15% above the average for this role
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