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Principal Analog Design Engineer at Astera Labs - ApplyBlast

Principal Analog Design Engineer

Astera Labs

2 months ago

4.3 on Glassdoor

San Jose, California, United States

Onsite

Full Time

Senior

0 applicants

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About this role

Astera Labs is seeking a Principal Analog Design Engineer to architect and develop high-performance analog and mixed-signal circuits for its AI connectivity platforms, including SerDes, PHY, and high‑speed I/O blocks. The role involves leading designs from concept through silicon bring‑up, setting technical standards for the analog team, and mentoring junior engineers.

Responsibilities

Architect high‑speed analog and mixed‑signal circuits
Lead silicon bring‑up, characterization, and debug
Set analog design methodology and mentor junior engineers

Skills

Qualifications

MS in Electrical EngineeringPhD in Electrical Engineering

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

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Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.