Celero Inc
Celero Communications is seeking an ASIC Design Engineer to develop high-performance digital, DSP, analog, and SerDes blocks for optical communication systems. The role involves designing, implementing, and optimizing ASIC circuits, collaborating with cross‑functional teams, and contributing from architecture through silicon validation.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
15% above the average for this role