ASIC IP STA Engineer

Micron Technology is seeking an experienced ASIC IP STA Engineer to lead post-layout Static Timing Analysis (STA) signoff and timing closure for high-speed interface IPs. This role involves close collaboration with IP Design, SoC Synthesis, and SoC Physical Design teams to ensure successful tapeouts and smooth SoC integration. The position requires expertise in timing analysis, constraint development, and advanced EDA methodologies.