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ASIC Verification Engineer at Hewlett Packard Enterprise - ApplyBlast

ASIC Verification Engineer

Hewlett Packard Enterprise

4 months ago

4.8 on Glassdoor

Bengaluru, Karnataka, India

Onsite

Full Time

Senior

0 applicants

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About this role

This onsite ASIC Verification Engineer role at HPE/Networking involves architecting and developing block-level verification environments using SystemVerilog and UVM methodology. The candidate will define verification suites for ASICs, perform gate-level simulations, and collaborate with logic designers and software developers to resolve bugs before tape-out.

Responsibilities

Architect and develop block-level verification environments using SystemVerilog and UVM
Define and deliver verification suites to enable faster, denser feature-rich systems
Verify large ASIC blocks and sign off with code and functional coverage analysis
Collaborate with logic designers to resolve bugs and assist in software bring-up
Develop Perl, Python, or shell scripts to enhance verification infrastructure

Skills

Qualifications

MSEEBSEE

About Hewlett Packard Enterprise

hpe.com

Headquarters

The Woodlands, Texas, United States

Company Size

10001+ employees

Founded

1939

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Discover HPE edge-to-cloud, enterprise compute IT, data, and security solutions. Learn how HPE empowers digital transformation through AI and sustainability.