Clocking Architect

Altera is seeking a highly experienced Clocking Architect to lead the end-to-end definition and integration of clocking architectures for next-generation FPGA and SoC devices. This role involves owning clock tree topology, domain partitioning, and frequency planning while ensuring compliance with functional and DFT timing requirements. The ideal candidate will define strategies for high-speed protocols, AI accelerators, and full-chip clock domain crossing verification to drive silicon architecture decisions.