DFT Engineering Technical Lead

The DFT Engineering Technical Lead is responsible for implementing Hardware Design-for-Test features and developing innovative DFT IP to support ATE, in-system test, and debug needs. This role involves collaborating with multi-functional teams to integrate testability features into full chip designs and validating test logic across implementation and post-silicon validation flows. The position requires crafting solutions and debugging with minimal mentorship while driving reusable test and debug strategies for new silicon device models.