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Lead Engineer – CAD Digital Verification at Silicon Labs - ApplyBlast

Lead Engineer – CAD Digital Verification

Silicon Labs

3 days ago

4.2 on Glassdoor

Hyderabad, Telangana, India

Onsite

Full Time

Senior

0 applicants

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About this role

The Lead Engineer – CAD Digital Verification role at Silicon Labs focuses on developing and enhancing CAD tools and EDA simulation flows to ensure efficient and reliable verification of semiconductor products. This position involves creating automation solutions, optimizing verification methodologies, and collaborating with design and verification teams to improve engineering productivity and design quality. The role supports ASIC and SoC development by addressing complex technical challenges and streamlining verification workflows.

Responsibilities

Develop and maintain CAD tools and EDA flows for design verification
Create automation scripts to streamline simulation and verification workflows
Collaborate with design teams and EDA vendors to optimize verification efficiency